1. Field of the Invention
This invention relates generally to I/C chip mounting structures which include a substrate and an electrically and thermally conducting cover plate and a method of manufacturing the same. In even more particular aspects, this invention relates to an I/C chip assembly which electrically insulates the chip from the cover plate but provides grounding of the substrate to the cover plate.
2. Background Information
In the packaging of I/C chips, there has developed a need for a chip package that includes a cover plate for the assembly, which cover plate is thermally conducting for heat transfer, and also electrically conducting for grounding the substrate, while preventing the chip itself from being electrically grounded to the cover plate, so that the cover plate can act as both a heat sink for the chip and also an electrical ground for the substrate.
According to the present invention, a chip mounting assembly is provided which includes a dielectric substrate having at least one integrated circuit (I/C) chip mounted thereon. An electrically conductive cover plate is in contact with said at least one chip by an electrically non-conducting thermally conducting material. A stiffener member is provided which is mounted on the substrate and laterally spaced from the integrated circuit chip. At least one electrically conductive ground pad is formed on the substrate. The stiffener member has at least one through opening therein and electrically conductive material extending through said at least one opening and contacting said cover plate and said at least one ground pad. The invention also provides a method of forming such an I/C chip assembly.
FIG. 1 is an exploded view of a substrate, a stiffener member and a thermal adhesive in position for lamination as a first step in the process of forming the device of the present invention;
FIG. 2 is a perspective view showing the substrate stiffener member and a film of adhesive material laminated together to form the basis for forming the present invention;
FIGS. 3-10 are longitudinal, sectional views, somewhat diagrammatic, showing the steps in forming an I/C chip assembly according to this invention, and
FIG. 11 is a flow chart of the steps involved in preparing the chip assembly.